Building Correlators with Many-Core Hardware

Many Core Hardware Architectures

Many-core architecture for programmable hardware accelerator

Partition-Based Hardware Transactional Memory for Many-Core Processors

Transactional memory is an appealing technology which frees programmer from lock-based programming. However, most of current hardware transactional memory systems are proposed for multi-core processors, and may face some challenges with the increasing of processor cores in many-core systems, such as inefficient utilization of transactional buffers, unsolved problem of transactional buffer overf...

Real Time Ray Tracing on Many-Core-Hardware

With the shift from highly clocked, single thread processors to chips that have dozens or even hundreds of smaller processors, we are witnessing a fundamental change in the computing hardware we use. This paper describes an approach to use modern many-core-hardware to apply real time ray tracing to Virtual Reality environments. We show that current hardware can speed up real time ray tracing to...

A Study of Many-Core Hardware Accelerated Hadoop MapReduce

MapReduce is a widely used framework for massive data processing. It was originally designed to overcome the I/O bottleneck, and enabled us to process Bigdata with the commodity clusters systems. However, several existing work have recently shown that the emerging high speed storage and network devices are capable to remove the I/O bottleneck and made the CPU the next serious bottleneck in the ...